Microprocessors in portable electronic equipment besides having a fast processing speed, must also have low power consumption to allow operation on battery power for long periods of time. Technology is known in the related art for using co-processors such as FPU (floating-point units) in microprocessors to attain fast processing speeds.
The following technology for low power consumption in microprocessors is also known in the related art.
Portable electronic devices are in standby for long periods of time so a low power (hereafter called power-saving mode) consumption mode is available for use while in standby so a method of the related art lowers the clock frequency used to operate the microprocessor during standby. More specifically, a clock divider lowers the clock frequency and supplies this frequency to the microprocessor when the lower power consumption mode is selected. The clock power consumption and the power used by transistor switching (per unit time) are thus reduced and the microprocessor thus achieves a state of low power consumption.
Another method, different from the method for lowering the clock frequency during standby, cuts off the supply of clock pulses to unused modules. The user break controller for instance, is a circuit for easy debugging of a program and so is not normally used during processor operation. Modules such as the user break controller which are not used during normal operation will not cause problems with operation even if the supply of clock pulses is cut off. This method for cutting off the supply of clock pulses is more effective than the method for lowering the clock frequency. As a specific measure to cut off the supply of clock pulses, unused modules are individually set in a control register for controlling the cutoff of the clock pulses, when an instruction to halt the clock is issued in order to save power, the supply of clock pulses to the modules set in the control register is halted. The power consumption in the modules set in the control register therefore decreases to zero. To use a module set in the control register, the specified module is reset by an interrupt (break-in) and the supply of clock pulses re-started. However, this method for cutting off the supply of clock pulses to a module is costly in terms of time and effort involving operations such as setting values in the register, and is not suited for modules that must often be run or stopped.
A method is disclosed in Japanese Patent Prepublication No. 8-101820 for generating an NOP (No operation) control signal for stopping internal circuit operation of the data base when data base operation is to be halted in order to save power. In this method, instructions are decoded and when decoding results are that data base operation is not to be performed, a one bit NOP signal CC=1 is issued. The control signal is fixed when the NOP signal CC=1 is issued and the latch for the data base control signal cannot be rewritten (changed). The data base input/output (I/O) latch also cannot be rewritten (changed) and the input/output data is kept at the same values. The input/output data does not change at this time, so no switching occurs in the data base and current consumption (power saving) can be achieved.
The method for generating an NOP (No operation) control signal for stopping internal circuit operation of the data base however had the following problems.
The NOP signal generation method was intended to reduce power consumption in the data base so there was no reduction in power consumed in the control section of the decoder. Besides controlling the issuing of instructions, the decoder control section, also performs tasks such as logic processing for generating control signals and non-routine (exceptional) task processing. The power consumption during these tasks cannot be ignored.
Adding a separate circuit as an energy conserving (power saving) circuit is also preferable from the viewpoint of IP (intellectual property) rights because using a separate circuit means there is no need to internally change a part functioning as a Co-processor and regarded as an intellectual property. The labor (man-hours) normally needed for verifying internal circuit changes in the IP (intellectual property) are therefore not required.
In view of the above problems with the related art, this invention has the object of providing a microprocessor achieving low power consumption with a simple structure by using an additional circuit to reduce power consumption in data base sections and control sections such as the decoder.
These and other objects of the invention as well as the unique features of the invention will be clarified from the following description of this invention and from the drawings.